[HaBo]

// Enable clock for SSC controller
*AT91C_PMC_PCER = (1 << AT91C_ID_SSC);

// SPI software reset
*AT91C_SSC_CR = AT91C_SSC_SWRST;

// Clock divider
*AT91C_SSC_CMR = 3;

// Configure receive clock
// TK Clock signal
// START: Detection of a low level on RF input
// Receive/Transmit Clock Inversion
//      The data inputs (Data and Frame Sync signals) are sampled on
//      Receive Clock rising edge. The Frame Sync signal output
//      is shifted out on Receive Clock falling edge.
*AT91C_SSC_RCMR = AT91C_SSC_CKS_TK | AT91C_SSC_START_LOW_RF | AT91C_SSC_CKI;

// Configure receive frame
*AT91C_SSC_RFMR = (6 << 8) |            // DATNB = 6 => 7 data words per frame
                  (15) |                // DATLEN = 15 => half-words are transfered (16 bit)
                  AT91C_SSC_MSBF;       // MSB first

// Enables Receive
*AT91C_SSC_CR = AT91C_SSC_RXEN;

if (*AT91C_SSC_RNCR == 0 && *AT91C_SSC_RCR == 0)
{
    *AT91C_SSC_RPR = (unsigned int)&data;
    *AT91C_SSC_RCR = sizeof(data) / 2;
    *AT91C_SSC_RNCR = 0;
    *AT91C_SSC_PTCR = AT91C_PDC_RXTEN;
}

typedef struct  _data {
  unsigned short value1;
  unsigned short value2;
  short value3;
  short value4;
  short value5;
  short value6;
  unsigned short value7;
} data, *pData;

if (*AT91C_SSC_RNCR == 0 && *AT91C_SSC_RCR == 0)

if (*AT91C_SSC_TNCR == 0 && *AT91C_SSC_TCR == 0)
{
    if (*AT91C_SSC_RNCR == 0 && *AT91C_SSC_RCR == 0)
    {
        *AT91C_SSC_RPR = (unsigned int)&data;
        *AT91C_SSC_RCR = sizeof(data) / 2;
        *AT91C_SSC_RNCR = 0;
        *AT91C_SSC_PTCR = AT91C_PDC_RXTEN;
    }
}